Bootstrap and boot blocks

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EtchedPixels
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Bootstrap and boot blocks

Post by EtchedPixels » 22 Jun 2019 17:27

Can someone point me at useful documentation for how the boot environment works.

I've got my OS loading (from CP/M) on the CF-II and getting to the point it wants a file system. Whilst there is still all sorts of other stuff to fix I'd really prefer to be able to boot it directly so I can put things like partition tables on the media and make it behave nicely.

Basically I want to get control at boot, load disk blocks 1-whatever from the boot area (where block 0 is the partition table/boot sector) and then take
control completely.

Alan

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Dave
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Re: Bootstrap and boot blocks

Post by Dave » 22 Jun 2019 18:12

Did you not get a CF card with the system?
Does it not boot off that ?

There are no partition tables, each "disk" is just a fixed sized space on the CF card, divided up into logical sectors. The system "tracks" are the first "sectors" on the "disk"

EtchedPixels
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Re: Bootstrap and boot blocks

Post by EtchedPixels » 22 Jun 2019 18:23

The CF card with it works fine for CP/M. However I am not trying to run CP/M but load and run my own OS on the machine.

Alan

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Dave
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Re: Bootstrap and boot blocks

Post by Dave » 22 Jun 2019 18:47

Then that's a pretty major rewrite.

Some info on low level CP/M stuff that you'd have to replace is here

http://primrosebank.net/computers/cpm/cpm_structure.htm

EtchedPixels
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Re: Bootstrap and boot blocks

Post by EtchedPixels » 22 Jun 2019 19:09

Been there, done that, already runs across a range of Z80, 6809 and 68000 platforms :D

https://github.com/EtchedPixels/FUZIX

All I need right now is the information on the boot behaviour. The rest works - at least on MEMU. As ever that doesn't always mean it runs on the hardware because emulators are never perfect - and also it doesn't emulate the CFII.

I am getting a bit closer now I've discovered the CFII doesn't like the CF card I was experimenting with (looks like CFII doesn't wait properly at boot but need to trace that further to see).

Alan

Martin A
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Re: Bootstrap and boot blocks

Post by Martin A » 22 Jun 2019 19:38

Since CPM doesn't know anything about partitions, on boot it just reads track 0, sector 1 (of 128 bytes) to 0100 and then jumps to 0100 with the stack set to 0200.

The silicon disc code looks for C3 01 40 to make sure the image is valid (JP 0140) but the CF code, like the original floppy doesn't. It assumes that because the read was successful, the sector is good.

It's in the CPMZMON01 file if you grab the CFX-II build 278 archive from Dave's site. Starting at .autob

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Dave
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Re: Bootstrap and boot blocks

Post by Dave » 22 Jun 2019 20:01

The source files for CFX-II were written to be compiled by Martin's "home brew" assembler, writing in BBCBASIC to run under RISCOS.

To allow people who don't use RISCOS to compile Martin's code, Bill Brendling has just released a Python script that compiles Z80 opcodes written in Microsoft MASM, Bill's own ZASM and Martin's assembler formats.

It is available here http://primrosebank.net/computers/mtx/t ... ls_dev.htm

EtchedPixels
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Re: Bootstrap and boot blocks

Post by EtchedPixels » 22 Jun 2019 20:07

Ok that makes sense..once I knew it only gave me 128 bytes.

Is the stuff that CP/M does calling via 0xFFF9 documented somewhere. I can see the call ends up loading 0x34 sectors to CE80 but not how you set which sector to start or what happens if you call it multiple times.

For now I've just squashed a CF loader into 128 bytes, and the whole system appears to be running correctly with two users on the two monitors. There is a bit noise and a pause at boot that I need to address on the disk probes and various things to tidy up like the 80 column autodetect but the basics actually seem to be working.

Thanks - and thanks also to Andy for the memory card.

Alan

EtchedPixels
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Re: Bootstrap and boot blocks

Post by EtchedPixels » 22 Jun 2019 21:07

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Dave
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Re: Bootstrap and boot blocks

Post by Dave » 22 Jun 2019 21:18

I have a feeling that I should be impressed :D

If that is two users connected to the MTX, how are the two users interfaced to the CPU? Over the serial ports?

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