The MTXplus has some very fancy clock controls designed by Tony Brewer. The CPU is booting at 4mhz, but can be switched up to 16mhz in 16 steps.
The same system keeps track of VDP writes and automatically inserts Z80 wait states when the CPU is running faster than 4mhz. /wait from the VDP is wired through that system so will be active if the CPU is switched up, it's enabled by the MTXplus rom early in the boot sequence.
The Fuzix system will be running at 4mhz since it won't know how to program the variable clock, which means the wait system is inactive.
The clock control utility from MTX basic and the one for CPM both re-program the CTC to keep the interrupts at 125hz. The CTC uses 2 daisy chained counters instead of the usual one in order to keep the system tick at 125hz.
so that could be the issue with scrolling, since the wait state system won't be active.
To set an 8mhz clock, sent &70 to port &FF, and program the CTC with time constants 100 and 40 and everything would be fine.
The full source for the SDX command USER SPEED is bellow. The data table sits at 3F00 in the SDX rom simply because it made the pointer maths easier. USER SPEED with no value prints the current clock speed. If there is a value or variable after the command the CPU and CTC will be set up with that speed rating (value mod 16 really,it doesn't range check. USER SPEED 1 is the same as USER SPEED 17)
Code: Select all
;report back the current CPU settings
.SPEED_details
inc DE ;step past the last character of the command
;;check to see if there is a number following the command
ld a,(DE)
cp &FF
JR z report_CPU_speed ;check the end of line marker
call getnxt ;hopefully this will read the value/variable
ld a,c ;get the low byte
add a,a
add a,a
add a,a
add a,a ;shift to the top 4 bits
out (&FF),A ;and set the clock
add a,5 ;offset into the table of the CPU frequency data
LD H,&3f
LD L,A ;HL now holds pointer to CPU clock data.
ld a,(hl)
ld (CPU_freq),A
inc HL
ld a,(hl)
ld (CPU_freq+1),A
inc HL
;now need to set up the CTC counters
Call IJinit ;turn off interrupts and reset the CTC just in case
LD A,&05 ;disable interrupt, prescale 16
OUT (&08),A
ld a,(hl) ;get time constant 1
OUT (&08),A
inc HL
LD A,&D5 ;Enable interrupt, counter mode, 0, rising edge,
;0, time constant follows, no reset, control word
OUT (&0B),A
ld a,(HL)
OUT (&0B),A
EI
;fall through to report the speed
.report_cpu_speed
RST &10
DB &8F
DB 13,10
DS "Master clock:"
ld H,&3f
in a,(&FF)
and &F0
ld l,a ;HL now points to the 5 byte string for the current speed description
ld b,5
.report_cpu_loop
ld a,(hl)
;rst &28
;db &AC
out (1),a
inc HL
DJNZ report_cpu_loop
; call newline
RST &10 ;print a "newline" a different way
DB &82
DB &0D,&0A
RET
;extended CPU speed table
org 3f00
.CPU_speed_table
;revised clock system has 16 available frequencies driven from a 32mhz master clock
;table format 5 byte string, 2 bytes major/minor speed, CTC clock settings, 7 bytes padding to make
;entries 16 bytes for quick access
; stored at the end of the rom to make setting up the ponter easy
DS " 4.00"
DB 4,0
DB 50,40
DB 0,0,0,0,0,0,0
DS " 4.57"
DB 4,57
DB 127,18
DB 0,0,0,0,0,0,0
DS " 4.92"
DB 4,92
DB 107,23
DB 0,0,0,0,0,0,0
DS " 5.33"
DB 5,33
DB 127,21
DB 0,0,0,0,0,0,0
DS " 5.82"
DB 5,82
DB 97,30
DB 0,0,0,0,0,0,0
DS " 6.40"
DB 6,40
DB 100,32
DB 0,0,0,0,0,0,0
DS " 7.11"
DB 7,11
DB 127,28
DB 0,0,0,0,0,0,0
DS " 8.00"
DB 8,00
DB 100,40
DB 0,0,0,0,0,0,0
DS " 8.53"
DB 8,53
DB 251,17
DB 0,0,0,0,0,0,0
DS " 9.14"
DB 9,14
DB 127,36
DB 0,0,0,0,0,0,0
DS " 9.85"
DB 9,85
DB 107,46
DB 0,0,0,0,0,0,0
DS "10.67"
DB 10,67
DB 127,42
DB 0,0,0,0,0,0,0
DS "11.64"
DB 11,64
DB 253,23
DB 0,0,0,0,0,0,0
DS "12.80"
DB 12,80
DB 200,32
DB 0,0,0,0,0,0,0
DS "14.22"
DB 14,22
DB 127,56
DB 0,0,0,0,0,0,0
DS "16.00"
DB 16,00
DB 200,40
DB 0,0,0,0,0,0,0