So, ever optimistic, I wrote some Z180 code to test reading and writing an SD card. Of course it does not work, fails on the first step of initialising the card
So back to trying baby steps. Remove the SD card adaptor, and link the MISO input to the MOSI output. This should resulting in receiving whatever byte is transmitted. That does not work either
The resulting input does depend upon what byte is transmitted, not always 0xFF, although that is the most common result. I have yet to work out what the relationship is.
I think my next step has to be to breadboard just the CPLD, and hook all the inputs and outputs to an RPi so that I can test systematically with complete control over each input.
It is perhaps interesting that Andy's VHDL for Rememoriser contains the following somewhat cryptic comment:
Code: Select all
-- Important: the process clocked on clk_50mhz that reads in bits can not be
-- sure that the newly arrived byte will be latched on the next cpu_clk.
-- Note that the CPU won't come and sample it that quickly anyway.
-- However, TimeQuest whinges about negative slack on setup, and I think that
-- Quartus's attempts to make the timings work here, breaks other timings.
-- By latching di in a process here, we somehow prevent this problem.
-- Some TimeQuest configuration of multi-cycles might also help.
My VHDL also generates timing warnings in Quartus. So far I have just ignored them. Perhaps I need to spend more time understanding this program.