Upgraded 65C02 Co-Processor - work in progress

Modern, Memotech inspired, hardware projects
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Martin A
Posts: 414
Joined: 09 Nov 2013 21:03

Upgraded 65C02 Co-Processor - work in progress

Post by Martin A » 01 Jan 2019 22:58

Elsewhere on the forum, Bill asked for details of my latest project.

It's still very much work in progress, but it's a upgraded 65C02 co-processor board for the MTX plus. The original 6502 board that we demonstrated at Memofest in Aberdeen runs HiBasic 3 from the BBC 2nd processor and passes all the I/O back to the MTX where the support rom is able to support a small subset of the BBC MOS sufficient to access the keyboard, MTX print stream and save programs to the CF.

The intention for the new board is that it has more local facilities, and relies less on the MTX for I/O. The basic system has 32k ram and just under 28k rom space available. Since basic VGA output needs a 25.175Mhz (or close) clock the am for the board is to run the CPU at 1/4 of that rate which is a healthy 6.3Mhz or so. However the prototype is actually running off the 1/2 VGA speed clock at 12.6mhz.

There's an on-board CPLD to provide a dedicated video output from a 2k dual port ram with a single 8 bit control port. In addition to the Video output CPLD decodes the memory map. The 6502 family doesn't have dedicated I/O ports like the Z80 so memory space has to be allocated instead. All the I/O is fitted into a single page of the 65C02 memory map, meaning the ROM space available is 1 page short of 28k.

In addition to the Video control port. the I/O sub section has an as yet untested 2 x 4 byte communications port for passing requests to the Z80 and a 65C22 VIA for more local I/O.

The board itself is MUCH more complicated, needing 17 devices (instead of 5 on the older board) for the 6502 side, leaving no room for a MTX side support and control rom. So that means any support software will have to be loaded in from CF.

At the moment the CPLD code has been partially tested and seems to work for the VGA output which is 40x25 or 80x25 text only. The memory mapping appears fine, and the next test will be to confirm if 2 way communication is possible between the z80 and 6502. After that the VIA need testing.

Though the hardware seems mostly ok so far, the software will be by far the most difficult part.
Component side showing 17 devices in place, and 2 empty sockets resulting from an early design change
new6502.jpg (63.2 KiB) Viewed 380 times
Wiring side, it all got a bit tight in places!
new6502-wiring.jpg (93.21 KiB) Viewed 380 times

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