Z80 CPU simulator: Visual Z80

About original Memotech hardware.
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Tony Brewer
Posts: 70
Joined: 08 Jan 2014 20:50

Z80 CPU simulator: Visual Z80

Post by Tony Brewer »

Visual Z80 (VZ80 for short) is an online transistor-level simulation of the Zilog NMOS Z80 CPU. Recently, Visual Z80 Remix (VZ80R for short) was created that uses the VZ80 simulator with a more user-friendly interface:
https://floooh.github.io/visualz80remix/
Improvements include Assembler and Timing Diagram options.

VZ80R is fun to use and some interesting Z80 properties can be seen. How the internal WZ register pair changes is easy to track. There are 5-bit and 6-bit shift register ring counters for M cycles and T states, respectively. M cycles can be skipped, e.g. POP BC has three M cycles, however instead of M1-M2-M3 they are M1-M4-M5. Other instructions also skip M cycles.

T states can never be skipped but during all internal or external wait states none of the T counter bits is set, which pauses the CPU. How the Z80 knows which T state to move on to after the wait is a bit of a mystery.

This weekend I discovered a bug using VZ80R. More details at https://stardot.org.uk/forums/viewtopic ... 36#p357136

Note: VZ80R uses the wrong node number for IFF1 (Interrupt Flip-Flop 1). IFF1 can be traced by entering 181 in the Watch: box in Trace Log. IFF2 is node 206.

Tip: Use first and third control buttons at top right to go backwards or forwards by one half-cycle and sixth button (Eject) to reset the Z80 simulation.

So that you can see the difference between original and remix, here is a URL that runs the program at the bottom of this post in VZ80:
http://www.visual6502.org/JSSim/expert- ... &steps=160

Code: Select all

	XOR A
	LD BC,1234H
	LD DE,5678H
	LD HL,9ABCH
	LD SP,0100H
	PUSH BC
	EX (SP),HL
	POP BC
P.S. Many thanks to Dave for the Special Reset tests in 2014.
Tony Brewer
Posts: 70
Joined: 08 Jan 2014 20:50

Re: Z80 CPU simulator: Visual Z80

Post by Tony Brewer »

New Z80 return to zero discovery yesterday: two combinations of input signals will result in a RET instruction returning to address 0000.
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gunrock
Posts: 107
Joined: 28 Oct 2020 21:17

Re: Z80 CPU simulator: Visual Z80

Post by gunrock »

Tony, this is amazing stuff. :o

Incredible that after all these years, the Z80 still has unknown corners to explore.
Steve Gardiner
Memotech MTX 512, CFX II and loving it
Tony Brewer
Posts: 70
Joined: 08 Jan 2014 20:50

Re: Z80 CPU simulator: Visual Z80

Post by Tony Brewer »

gunrock wrote: 06 May 2022 09:47 Tony, this is amazing stuff. :o

Incredible that after all these years, the Z80 still has unknown corners to explore.
Thanks for the reply, Steve. Visual Z80 is an almost perfect simulation (not emulation) of the Z80 and the Remix version is the easiest way to examine those corners. Here is an explanation of what I call Z80 return to zero:

An instruction in which a Special Reset pulse occurs will be completed before the reset. This includes an opcode fetch of the next instruction because most Z80 instructions end during the next fetch due to the fetch-execute overlap. If /NMI has gone low or /INT is low and interrupts are enabled before the last T-state of the Special Reset instruction then the interrupt will be accepted. The next opcode fetch will be part of the interrupt acknowledge cycle and at the beginning of this PC is zeroed due to the Special Reset pulse therefore 0000 will pushed onto the stack. The interrupt routine of any duration and number of instructions will be executed next at the end of which the RET instruction returns to address zero, thereby resetting the CPU.
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