undo 25p64 eprom mod ?

[Martin A]

The 2564 is an 8K device, you should be seeing A11 and A12 already connected to the socket.

TMS2564.PDF

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A0 to A10 only gives you 2k of memory space.

You -can- connect the other chip selects to Address lines (A13 and A14 maybe) BUT you'll also need some way of combining all 3 chip selects together to enable the larger rom in all 3 memory areas. Otherwise your larger memory device will only be active for the 8k range of whatever socket you plug it into.

If you're going to do that level of fiddling then re-wiring for 27C64 (and/or 28C64) as on Dave's page is probably simpler.

[Crazyboss]

yes of cause A11+A12 should be present for the 8k, I must be sleeping

But are all the 3 rom sockets not connected to the adress and databus all the time ?

so if A13 and A14 is used as extra chip-selects ?

Could this larger chip not just be connected to any socket then ?

so if the chip is programmed with all 3 roms. And we put it in rom socket A, and connect Chipselect from Socket B to A13 and Chipselect from Socket C to A14, and the data is alligned correct in the larger chip should it not work ?

I might be more simple to do it with 3 chips but many i misunderstood how this hardware works lol

//CLAUS

The 2564 is an 8K device, you should be seeing A11 and A12 already connected to the socket.
TMS2564.PDF
A0 to A10 only gives you 2k of memory space.

You -can- connect the other chip selects to Address lines (A13 and A14 maybe) BUT you'll also need some way of combining all 3 chip selects together to enable the larger rom in all 3 memory areas. Otherwise your larger memory device will only be active for the 8k range of whatever socket you plug it into.

If you're going to do that level of fiddling then re-wiring for 27C64 (and/or 28C64) as on Dave's page is probably simpler.

[Martin A]

That won't work, with the chip select to rom B (CSB for short) connected to A13, how is the chip in socket A going to be selected when the system want's to access rom B?

Putting the chip selects onto the address lines, yes that will change the address ranges if the larger chip is selected when when CSB or CSC is active

BUT unlesss you find a way to combine the chip selects as well, the chip is only selected when the system wants rom A.

It may help if you think of the chip select signal as "socket select" instead.

[Crazyboss]

Thanks Martin for the feedback, I found some 8k flash roms, mostly pin compatible with the layout this specific board have without do any changes to it.
3 pins have to be routed to other places, so i think i will give that a try one day

//CLAUS.

That won't work, with the chip select to rom B (CSB for short) connected to A13, how is the chip in socket A going to be selected when the system want's to access rom B?

Putting the chip selects onto the address lines, yes that will change the address ranges if the larger chip is selected when when CSB or CSC is active

BUT unlesss you find a way to combine the chip selects as well, the chip is only selected when the system wants rom A.

It may help if you think of the chip select signal as "socket select" instead.

[1024MAK]

It is possible to use a single ROM (EPROM/EEPROM/flash) chip. But as Martin says, some extra control circuitry is needed.

So:
The single large ROM chip needs a logic low on its /CS (or /CE or /E depending on what the manufacturer called the control input) when the /CS line is low for ROM socket A, ROM socket B or ROM socket C.

Either that, or the PAL needs replacing with a GAL that has the configuration changed to output a single /CS (chip select) output and extra bank select outputs.

Using three memory chips is a lot easier.

Mark