If I'm reading the schematic for the RS232 board correctly, Rom decode for the FDX is potentially as much of a problem as the I/O port decode. Whist the DART is compatible with the CFX it looks like the communications part of the board isn't.
So I've come up with a GAL design that enables just the DART.
That should prevent the 74LS245 on the communications board connecting the data bus to fresh air ...
Code: Select all
Name Rs232-GAL ;
PartNo ATF16V8B ;
Date 15/05/2019 ;
Revision 01 ;
Designer Engineer ;
Company None ;
Assembly None ;
Location ;
Device g16v8a ;
/* *************** INPUT PINS *********************/
/* Namings as per MTX manual page 246 */
PIN 1 = MREQ ; /* */
PIN 2 = RDL ; /* */
PIN 3 = M1L ; /* */
PIN 4 = IORQL ; /* */
PIN 5 = DTIEO ; /* */
PIN 6 = BUSAKL ; /* */
PIN 7 = A7 ; /* */
PIN 8 = A6 ; /* */
PIN 9 = A5 ; /* */
PIN 11 = A432 ; /* */
PIN 12 = RELCPMH ; /* */
PIN 13 = R1 ; /* */
PIN 18 = R2 ; /* */
PIN 19 = EXT245 ; /* */
/* *************** OUTPUT PINS *********************/
/* PIN 14 = 245DIR ; /* */
PIN 15 = DARTEN ; /* */
/* PIN 16 = O3 ; /* */
/* PIN 17 = ND ; /* */
field address = [A7..0] ;
/* external 74LS245 Pin B3 on the external connector */
/* original equation equivalent to: */
/* !245DIR = */
/* !EXT245 */
/* # !M1L & !IORQL & DTIEO */
/* # !BUSAKL & RDL */
/* ; */
/* z80 DART enabled on ports 0C to 0F the top 3 bits */
/* come from the connected address bits, the remaining */
/* 3 bits from the A234 signal generated externally */
!DARTEN =
address:[00..1F] & !A432 & !IORQL & M1L
;
/* External rom partial decode */
/* original equation equivalent to: */
/* !O3 = */
/* !MREQ & !RDL & !RELCPMH & !R1 & R2 */
/* ; */
/* original equation equivalent to: */
/* address:[20..FF] & !RDL & M1L */
/* !ND = */
/* ; */
The JED file produced is pretty compact, as it's only enabling one pin:
Code: Select all
CUPL(WM) 5.0a Serial# 60008009
Device g16v8as Library DLIB-h-40-2
Created Wed May 15 19:37:05 2019
Name Rs232-GAL
Partno ATF16V8B
Revision 01
Date 15/05/2019
Designer Engineer
Company None
Assembly None
Location
*QP20
*QF2194
*G0
*F0
*L01024 11110111101111111111101110111010
*L02048 00000000010000010101010001000110
*L02080 00110001001101100101011000111000
*L02112 01000010111101111111111111111111
*L02144 11111111111111111111111111111111
*L02176 111111111111111110
*C0EDE
*7DC7